1. Field of the Invention
The invention is related to a level-shift circuit operating with a supply voltage higher than the operation voltage of the transistors, and more specifically, related to a high-speed level-shift circuit compatible with multiple supply voltage.
2. Description of the Related Art
In integrated circuits, the supply voltage is reduced as low as possible for lowering power consumption, and the supply voltage is thus continually reduced in integrated circuits. On the other hand, conventional integrated circuits with high supply voltage have also been adopted. For this purpose, multiple supply voltages are ready in a single system for handover. When an integrated circuit with different supply voltages is coupled, the voltage level of a signal must be converted into the other level by a level-shift circuit. For example, in an integrated circuit, a 0.9V digital signal is converted into an output signal with 1.2V to 3.3V.
The most well-known level-shift circuit uses a CMOS level-shift circuit. However, each PMOS transistor and each NMOS transistor has a different punch-through voltage in a different manufacturing process. When coupled to another integrated circuit, the supply voltage is switched between two supply voltages, in which one of the supply voltages is higher than the punch-through voltage of each of the PMOS transistors and NMOS transistors. This is a huge challenge for the designer of a level-shift circuit.
For example, a level-shift circuit converting 0.9V into 3.3V is easily implemented in 40 nm or any larger dimension manufacturing process. However, the structure requires some transistors to withstand more than 3.3V, and the voltage-endurance of transistors is about 2.4V in 2.8 nm or other more advanced processes. In this case, when converting a 0.9V digital signal into a 3.3V output signal, the transistors would be punched-through due to a 3.3V supply voltage such that the conventional level-shift could not be adopted.
Therefore, we need a new type of level-shift circuit to conquer the problems described above, and we need a level-shift circuit design to implement a level-shift with a higher supply voltage than the punch-through voltage of transistors.